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B
E. Bank-Tavakoli, Riera, M. , Quraishi, M. Hassan, and Ren, F. , “FSCHOL: An OpenCL-based HPC Framework for Accelerating Sparse Cholesky Factorization on FPGAs”, The 33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). Virtual Event, pp. 209-220, 2021. (380.33 KB)
S. Biookaghazadeh, Zhao, M. , and Ren, F. , “Are FPGAs Suitable for Edge Computing?”, The USENIX Workshop on Hot Topics in Edge Computing (HotEdge '18). BOSTON, MA, 2018. (363.22 KB)
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M. Chen, Hu, Q. , Yu, Z. , Thomas, H. , Feng, A. , Hou, Y. , McCullough, K. , Ren, F. , and Soibelman, L. , “STPLS3D: A Large-Scale Synthetic and Real Aerial Photogrammetry 3D Point Cloud Dataset”, The British Machine Vision Conference (BMVC). London, UK, 2022. (11.33 MB)
L. Cheng, Xu, W. , Ren, F. , Gong, F. , Gupta, P. , and He, L. , “Statistical Timing and Power Analysis of VLSI Considering Non-linear Dependence”, the VLSI Journal Integration, vol. 47, no. 4, pp. 487–498, 2014. (845.26 KB)
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R. Dorrance, Ren, F. , Toriyama, Y. , Amin, A. , Yang, C. - K. K. , and Marković, D. , “Scalability And Design-space Analysis of A 1T-1MTJ Memory Cell”, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE, pp. 32-36, 2011. (1.1 MB)
R. Dorrance, Ren, F. , and Marković, D. , “A Scalable Sparse Matrix-vector Multiplication Kernel for Energy-efficient Sparse-BLAS on FPGAs”, Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA). ACM, pp. 161-170, 2014. (558.35 KB)
R. Dorrance, Ren, F. , Toriyama, Y. , Hafez, A. Amin, Yang, C. - K. K. , and Marković, D. , “Scalability and Design-space Analysis of A 1T-1MTJ Memory Cell For STT-RAMs”, IEEE Transactions on Electron Devices, vol. 59, no. 4, pp. 878–887, 2012. (1.1 MB)
A. Dua, “Hardware Acceleration of Video Analytics on FPGA Using OpenCL”, Arizona State University, Tempe, 2019. (2.83 MB)
A. Dua, Li, Y. I. , and Ren, F. , “Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing”, 2020.
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Y. Feng, Yang, F. , Zhou, X. , Guo, Y. , Tang, F. , Ren, F. , Guo, J. , and Ji, S. , “A Deep Learning Approach for Targeted Contrast-Enhanced Ultrasound Based Prostate Cancer Detection”, IEEE/ACM Transactions on Computational Biology and Bioinformatics, vol. 16, no. 6, pp. 1794-1801, 2019. (1.73 MB)
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B. Hu, Ren, F. , Chen, Z. - Z. , Jiang, X. , and Chang, M. - C. Frank, “An 8-Bit Compressive Sensing ADC With 4GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 10, pp. 934-938, 2016. (1.8 MB)
B. Hu, Ren, F. , Chen, Z. - Z. , Jiang, X. , and Chang, M. - C. Frank, “9-bit time–digital-converter-assisted compressive-sensing analogue–digital-converter with 4 GS/s equivalent speed”, IET Electronics Letters, vol. 52, no. 6, pp. 430-432, 2016. (511.29 KB)
H. Huang, Yu, H. , Zhuo, C. , and Ren, F. , “A Compressive-sensing based Testing Vehicle for 3D TSV Pre-bond and Post-bond Testing Data”, International Symposium on Physical Design (ISPD). pp. 19-25, 2016. (1.21 MB)
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Y. I. Li, Liu, Z. , Liu, W. , Jiang, Y. , Wang, Y. , Goh, W. Ling, Yu, H. , and Ren, F. , “A 34-FPS 698-GOP/s/W Binarized Deep Neural Network-based Natural Scene Text Interpretation Accelerator for Mobile Edge Computing”, IEEE Transactions on Industrial Electronics (TIE), vol. 66, no. 9, pp. 7407-7416, 2019. (3.34 MB)
Y. I. Li, Zhang, S. , Zhou, X. , and Ren, F. , “Build a Compact Binary Neural Network through Bit-level Sensitivity and Data Pruning”, Neurocomputing, vol. 398, pp. 45-54, 2020. (1.91 MB)
J. Li, Liang, J. , Li, L. , Ren, F. , Hu, W. , Li, J. , Qi, S. , and Pei, Q. , “Healable Capacitive Touch Screen Sensors Based on Transparent Composite Electrodes Comprising Silver Nanowires and a Furan/Maleimide Diels-Alder Cycloaddition Polymer”, ACS Nano, vol. 8, no. 12, pp. 12874–12882, 2014. (6.99 MB)
Y. I. Li, Liu, Z. , Xu, K. , Yu, H. , and Ren, F. , “A GPU-Outperforming FPGA Accelerator Architecture for Binary Convolutional Neural Networks”, ACM Journal on Emerging Technologies in Computing (JETC) - Special Issue on Frontiers of Hardware and Algorithms for On-chip Learning​, vol. 14, no. 2, p. 18.16, 2018. (1.92 MB)
W. Li, Zhou, B. , Hsu, C. - Y. , Li, Y. I. , and Ren, F. , “Recognizing terrain features on terrestrial surface using a deep learning model - An example with crater detection”, 1st ACM SIGSPATIAL Workshop on Articial Intelligence and Deep Learning for Geographic Knowledge Discovery. ACM, Los Angeles, CA, pp. 33-36, 2017. (4.93 MB)
Y. I. Li, Dua, A. , and Ren, F. , “Light-Weight RetinaNet for Object Detection on Edge Devices”, The 2020 IEEE World Forum on Internet of Things (WF-IoT'20). New Orleans, Louisiana, 2020. (2.43 MB)
Y. I. Li, “Hardware-friendly Deep Learning for Edge Computing”, Arizona State University, Tempe, 2021. (7.78 MB)
Y. I. Li and Ren, F. , “BNN Pruning: Pruning Binary Neural Network Guided by Weight Flipping Frequency”, International Symposium on Quality Electronic Design (ISQED). Santa Clara, CA, 2020. (186.31 KB)
B. Li and Ren, F. , “Enabling Deep Learning for Edge Computing”. 2019. (5.52 MB)
Z. Liu, Li, Y. , Ren, F. , and Yu, H. , “A Binary Convolutional Encoder-decoder Network for Real-time Natural Scene Text Processing”, The 1st International Workshop on Efficient Methods for Deep Neural Networks - Conference on Neural Information Processing Systems (NIPS). 2016. (773.3 KB)
Z. Liu, Li, Y. I. , Ren, F. , Yu, H. , and Goh, W. , “SqueezedText: A Real-time Scene Text Recognition by Binary Convolutional Encoder-decoder Network”, The AAAI Conference on Artificial Intelligence (AAAI). New Orleans, Louisana, pp. 7194-7201, 2018. (1.49 MB)
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D. Markovic and Ren, F. , “Scalable and Parameterized VLSI Architecture for Compressive Sensing Sparse Approximation”, US14/446,272, 2015.
A. Gunavelu Mohan, “Hardware Acceleration of Most Apparent Distortion Image Quality Assessment Algorithm on FPGA Using OpenCL”, Arizona State University, 2017. (1.21 MB)
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H. Park, Dorrance, R. , Amin, A. , Ren, F. , Marković, D. , and Yang, C. K. Ken, “Analysis of STT-RAM Cell Design With Multiple MTJs Per Access”, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE Computer Society, pp. 53-58, 2011. (320.88 KB)
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M. Hassan Quraishi, Bank-Tavakoli, E. , and Ren, F. , “A Survey of System Architectures and Techniques for FPGA Virtualization”, IEEE Transactions on Parallel and Distributed Systems, vol. 32, no. 9, pp. 2216-2230, 2021. (435.22 KB)
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F. Ren and Marković, D. , “True Energy-performance Analysis Of The MTJ-based Logic-in-memory Architecture (1-bit Full Adder)”, IEEE Transactions on Electron Devices, vol. 57, no. 5, pp. 1023–1028, 2010. (632.59 KB)
F. Ren, Xu, K. , and Zhang, Z. , “LAPRAN: A SCALABLE LAPLACIAN PYRAMID RECONSTRUCTIVE ADVERSARIAL NETWORK FOR FLEXIBLE COMPRESSIVE SENSING RECONSTRUCTION”, 16/745,817, 2020.
F. Ren, “Energy-performance Characterization of CMOS/Magnetic Tunnel Junction (MTJ) Hybrid Logic Circuits”, University of California, Los Angeles, Los Angeles, 2011. (1.05 MB)
F. Ren, Park, H. , Yang, C. - K. K. , and Marković, D. , “Reference Calibration of Body-voltage Sensing Circuit for High-speed STT-RAMs”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 60, no. 11, pp. 2932–2939, 2013. (1.78 MB)
F. Ren, Park, H. , Dorrance, R. , Toriyama, Y. , Yang, C. - K. K. , and Marković, D. , “A Body-voltage-sensing-based Short Pulse Reading Circuit for Spin-torque Transfer RAMs (STT-RAMs)”, Proceedings of the 2012 13th International Symposium on Quality Electronic Design (ISQED). IEEE, pp. 275-282, 2012. (559.47 KB)
F. Ren and Marković, D. , “A Configurable 12-to-237KS/s 12.8 mW Sparse-approximation Engine for Mobile ExG Data Aggregation”, Proceedings of the 2015 IEEE International Solid-State Circuits Conference (ISSCC). IEEE, pp. 68-78, 2015. (6.94 MB)
F. Ren and Marković, D. , “A Configurable 12–237 kS/s 12.8 mW Sparse-Approximation Engine for Mobile Data Aggregation of Compressively Sampled Physiological Signals”, IEEE Journal of Solid-State Circuits, vol. 51, no. 1, pp. 68-78, 2016. (3.07 MB)
F. Ren, Zhang, C. , Liu, L. , Xu, W. , Owall, V. , and Marković, D. , “A Square-Root-Free Matrix Decomposition Method for Energy-Efficient Least Square Computation on Embedded Systems”, IEEE Embedded Systems Letters, vol. 6, no. 4, pp. 73–76, 2014. (912.74 KB)
F. Ren and Xu, K. , “Real time end-to-end learning system for a high frame rate video compressive sensing network”, US16/165,568, 2019.
F. Ren, Dorrace, R. , Xu, W. , and Marković, D. , “A Single-precision Compressive Sensing Signal Reconstruction Engine on FPGAs”, Proceedings of the 23rd International Conference on Field Programmable Logic and Applications (FPL). IEEE, pp. 1-4, 2013. (358.12 KB)
F. Ren, “A Scalable VLSI Architecture for Real-Time and Energy-Efficient Sparse Approximation in Compressive Sensing Systems”, University of California, Los Angeles, Los Angeles, 2015. (5.71 MB)
F. Ren, Xu, W. , and Marković, D. , “Scalable and Parameterised VLSI Architecture for Efficient Sparse Approximation in FPGAs And SoCs”, IET Electronics Letters, vol. 49, no. 23, pp. 1440–1441, 2013. (154.45 KB)
M. Riera, Bank-Tavakoli, E. , Quraishi, M. Hassan, and Ren, F. , “HALO 1.0: A Hardware-agnostic Accelerator Orchestration Framework for Enabling Hardware-agnostic Programming with True Performance Portability for Heterogeneous HPC”. Under Review.
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K. - L. Wang, Yang, C. - K. K. , Markovic, D. , and Ren, F. , “Body Voltage Sensing Based Short Pulse Reading Circuit”, PCT/US2012/056136, 2014.
Y. Wang, Li, X. , Xu, K. , Ren, F. , and Yu, H. , “Data-Driven Sampling Matrix Boolean Optimization for Energy-Efficient Biomedical Signal Acquisition by Compressive Sensing”, IEEE Transactions on Biomedical Circuits and Systems, vol. 11, no. 2, pp. 255-266, 2017. (2.53 MB)
Y. Wei, Zhou, J. , Wang, Y. , Liu, Y. , Liu, Q. , Luo, J. , Wang, C. , Ren, F. , and Huang, L. , “A Review of Algorithm & Hardware Design for AI-Based Biomedical Applications”, IEEE Transactions on Biomedical Circuits and Systems , vol. 14, no. 2, pp. 145-163, 2020. (2.08 MB)
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K. Xu, Qin, M. , Sun, F. , Wang, Y. , Chen, Y. - K. , and Ren, F. , “Learning in the Frequency Domain”, IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR). Seattle, WA, pp. 1740-1749, 2020. (4.98 MB)
K. Xu, Li, Y. , and Ren, F. , “A Data-Driven Compressive Sensing Framework Tailored For Energy-Efficient Wearable Sensing”, The 42nd IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP). New Orleans, LA, pp. 861-865, 2017. (837.1 KB)
W. Xu, Huang, M. - C. , Liu, J. J. , Ren, F. , Shen, X. , Liu, X. , and Sarrafzadeh, M. , “mCOPD: Mobile Phone Based Lung Function Diagnosis and Exercise System for COPD”, Proceedings of the 6th International Conference on Pervasive Technologies Related to Assistive Environments (PETRA). ACM, 2013. (646.4 KB)
K. Xu, Li, Y. I. , and Ren, F. , “An Energy-Efficient Compressive Sensing Framework Incorporating Online Dictionary Learning for Long-Term Wireless Health Monitoring”, Proceedings of the 41st IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP). IEEE, Shanghai, China, pp. 804 - 808, 2016. (794.86 KB)
K. Xu, Zhang, Z. , and Ren, F. , “LAPRAN: A Scalable Laplacian Pyramid Reconstructive Adversarial Network for Flexible Compressive Sensing Reconstruction”, The 15th European Conference on Computer Vision (ECCV'18). Munich, Germany, pp. 491-507, 2018. (1.41 MB)
K. Xu, “Learning in Compressed Domains”, Arizona State University, Tempe, 2021. (18.22 MB)

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