@article {16,
	title = {True Energy-performance Analysis Of The MTJ-based Logic-in-memory Architecture (1-bit Full Adder)},
	journal = {IEEE Transactions on Electron Devices},
	volume = {57},
	year = {2010},
	month = {Mar.},
	pages = {1023{\textendash}1028},
	abstract = {<p><span>The use of spin-transfer torque (STT) devices for memory design has been a subject of research since the discovery of the STT on MgO-based magnetic tunnel junctions (MTJs). Recently, MTJ-based computing architectures such as logic-in-memory have been proposed and claim superior energy-delay performance over static CMOS. In this paper, we conduct exhaustive energy-performance analysis of an STT-MTJ-based logic-in-memory (LIM-MTJ) 1-bit full adder and compare it with its corresponding CMOS counterpart. Our results show that the LIM-MTJ circuit has no advantage in energy-performance over its equivalent CMOS designs. We also show that the MTJ-based logic circuit requiring frequent MTJ switching during the operation is hardly power efficient.</span></p>},
	keywords = {psclab},
	url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5437290\&tag=1},
	author = {Ren, Fengbo and Markovi{\'c}, Dejan}
}
