Analysis of STT-RAM Cell Design With Multiple MTJs Per Access

TitleAnalysis of STT-RAM Cell Design With Multiple MTJs Per Access
Publication TypeConference Proceedings
Year of Publication2011
AuthorsPark, H, Dorrance, R, Amin, A, Ren, F, Marković, D, Yang, CKKen
Conference NameProceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)
Pagination53-58
Date Published01/2011
PublisherIEEE Computer Society
Keywords (or New Research Field)psclab
Abstract

Density of STT-RAMs is limited by the area cost and width of the access device in a cell since it needs to support the programming currents. This paper explores a cell structure that shares each cell's access transistor with multiple MTJ memory elements. Feasibility and limitations of such a cell structure is explored for both reading and writing of the memory. The analytical and simulation results indicate that only small amount of sharing is possible and having MTJs that can handle a high read current without disturbing the cell is needed.

URLhttp://dl.acm.org/citation.cfm?id=2052103