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2013
F. Ren, Park, H. , Yang, C. - K. K. , and Marković, D. , “Reference Calibration of Body-voltage Sensing Circuit for High-speed STT-RAMs”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 60, no. 11, pp. 2932–2939, 2013. (1.78 MB)
F. Ren, Xu, W. , and Marković, D. , “Scalable and Parameterised VLSI Architecture for Efficient Sparse Approximation in FPGAs And SoCs”, IET Electronics Letters, vol. 49, no. 23, pp. 1440–1441, 2013. (154.45 KB)
X. Zhang, Xu, W. , Huang, M. - C. , Amini, N. , and Ren, F. , “See UV on Your Skin: An Ultraviolet Sensing and Visualization System”, Proceedings of the 8th International Conference on Body Area Networks (BodyNets). ICST (Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering), pp. 22-28, 2013. (1.82 MB)
F. Ren, Dorrace, R. , Xu, W. , and Marković, D. , “A Single-precision Compressive Sensing Signal Reconstruction Engine on FPGAs”, Proceedings of the 23rd International Conference on Field Programmable Logic and Applications (FPL). IEEE, pp. 1-4, 2013. (358.12 KB)
2012
F. Ren, Park, H. , Dorrance, R. , Toriyama, Y. , Yang, C. - K. K. , and Marković, D. , “A Body-voltage-sensing-based Short Pulse Reading Circuit for Spin-torque Transfer RAMs (STT-RAMs)”, Proceedings of the 2012 13th International Symposium on Quality Electronic Design (ISQED). IEEE, pp. 275-282, 2012. (559.47 KB)
R. Dorrance, Ren, F. , Toriyama, Y. , Hafez, A. Amin, Yang, C. - K. K. , and Marković, D. , “Scalability and Design-space Analysis of A 1T-1MTJ Memory Cell For STT-RAMs”, IEEE Transactions on Electron Devices, vol. 59, no. 4, pp. 878–887, 2012. (1.1 MB)
2011
H. Park, Dorrance, R. , Amin, A. , Ren, F. , Marković, D. , and Yang, C. K. Ken, “Analysis of STT-RAM Cell Design With Multiple MTJs Per Access”, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE Computer Society, pp. 53-58, 2011. (320.88 KB)
F. Ren, “Energy-performance Characterization of CMOS/Magnetic Tunnel Junction (MTJ) Hybrid Logic Circuits”, University of California, Los Angeles, Los Angeles, 2011. (1.05 MB)
R. Dorrance, Ren, F. , Toriyama, Y. , Amin, A. , Yang, C. - K. K. , and Marković, D. , “Scalability And Design-space Analysis of A 1T-1MTJ Memory Cell”, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE, pp. 32-36, 2011. (1.1 MB)
2010
F. Ren and Marković, D. , “True Energy-performance Analysis Of The MTJ-based Logic-in-memory Architecture (1-bit Full Adder)”, IEEE Transactions on Electron Devices, vol. 57, no. 5, pp. 1023–1028, 2010. (632.59 KB)

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