Publication

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Conference Proceedings
F. Ren and Marković, D. , A Configurable 12-to-237KS/s 12.8 mW Sparse-approximation Engine for Mobile ExG Data Aggregation, Proceedings of the 2015 IEEE International Solid-State Circuits Conference (ISSCC). IEEE, pp. 68-78, 2015. (6.94 MB)
H. Huang, Yu, H. , Zhuo, C. , and Ren, F. , A Compressive-sensing based Testing Vehicle for 3D TSV Pre-bond and Post-bond Testing Data, International Symposium on Physical Design (ISPD). pp. 19-25, 2016. (1.21 MB)
F. Ren, Park, H. , Dorrance, R. , Toriyama, Y. , Yang, C. - K. K. , and Marković, D. , A Body-voltage-sensing-based Short Pulse Reading Circuit for Spin-torque Transfer RAMs (STT-RAMs), Proceedings of the 2012 13th International Symposium on Quality Electronic Design (ISQED). IEEE, pp. 275-282, 2012. (559.47 KB)
Y. I. Li and Ren, F. , BNN Pruning: Pruning Binary Neural Network Guided by Weight Flipping Frequency, International Symposium on Quality Electronic Design (ISQED). Santa Clara, CA, 2020. (186.31 KB)
Z. Liu, Li, Y. , Ren, F. , and Yu, H. , A Binary Convolutional Encoder-decoder Network for Real-time Natural Scene Text Processing, The 1st International Workshop on Efficient Methods for Deep Neural Networks - Conference on Neural Information Processing Systems (NIPS). 2016. (773.3 KB)
S. Biookaghazadeh, Zhao, M. , and Ren, F. , Are FPGAs Suitable for Edge Computing?, The USENIX Workshop on Hot Topics in Edge Computing (HotEdge '18). BOSTON, MA, 2018. (363.22 KB)
H. Park, Dorrance, R. , Amin, A. , Ren, F. , Marković, D. , and Yang, C. K. Ken, Analysis of STT-RAM Cell Design With Multiple MTJs Per Access, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE Computer Society, pp. 53-58, 2011. (320.88 KB)

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