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Conference Proceedings
I. Hubara, Courbariaux, M. , Soudry, D. , El-Yaniv, R. , and Bengio, Y. , Binarized neural networks, Advances in neural information processing systems. pp. 4107–4115, 2016.
M. Courbariaux, Bengio, Y. , and David, J. - P. , Binaryconnect: Training deep neural networks with binary weights during propagations, Advances in Neural Information Processing Systems. pp. 3123–3131, 2015.
Y. Chen, Luo, T. , Liu, S. , Zhang, S. , He, L. , Wang, J. , Li, L. , Chen, T. , Xu, Z. , Sun, N. , and , , Dadiannao: A machine-learning supercomputer, Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture. IEEE Computer Society, pp. 609–622, 2014.
Y. Chen, Luo, T. , Liu, S. , Zhang, S. , He, L. , Wang, J. , Li, L. , Chen, T. , Xu, Z. , Sun, N. , and , , Dadiannao: A machine-learning supercomputer, Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture. IEEE Computer Society, pp. 609–622, 2014.
T. Chen, Du, Z. , Sun, N. , Wang, J. , Wu, C. , Chen, Y. , and Temam, O. , Diannao: A small-footprint high-throughput accelerator for ubiquitous machine-learning, ACM Sigplan Notices, vol. 49. ACM, pp. 269–284, 2014.
T. Chen, Du, Z. , Sun, N. , Wang, J. , Wu, C. , Chen, Y. , and Temam, O. , Diannao: A small-footprint high-throughput accelerator for ubiquitous machine-learning, ACM Sigplan Notices, vol. 49. ACM, pp. 269–284, 2014.
T. S. Czajkowski, Aydonat, U. , Denisenko, D. , Freeman, J. , Kinsner, M. , Neto, D. , Wong, J. , Yiannacouras, P. , and Singh, D. P. , From OpenCL to high-performance hardware on FPGAs, Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on. IEEE, pp. 531–534, 2012.
K. Xu, Qin, M. , Sun, F. , Wang, Y. , Chen, Y. - K. , and Ren, F. , Learning in the Frequency Domain, IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR). Seattle, WA, pp. 1740-1749, 2020. (4.98 MB)
C. Zhang, Li, P. , Sun, G. , Guan, Y. , Xiao, B. , and Cong, J. , Optimizing fpga-based accelerator design for deep convolutional neural networks, Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. ACM, pp. 161–170, 2015.
Journal Article
B. Hu, Ren, F. , Chen, Z. - Z. , Jiang, X. , and Chang, M. - C. Frank, An 8-Bit Compressive Sensing ADC With 4GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 10, pp. 934-938, 2016. (1.8 MB)
B. Hu, Ren, F. , Chen, Z. - Z. , Jiang, X. , and Chang, M. - C. Frank, An 8-Bit Compressive Sensing ADC With 4GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 10, pp. 934-938, 2016. (1.8 MB)
B. Hu, Ren, F. , Chen, Z. - Z. , Jiang, X. , and Chang, M. - C. Frank, 9-bit time–digital-converter-assisted compressive-sensing analogue–digital-converter with 4 GS/s equivalent speed, IET Electronics Letters, vol. 52, no. 6, pp. 430-432, 2016. (511.29 KB)
B. Hu, Ren, F. , Chen, Z. - Z. , Jiang, X. , and Chang, M. - C. Frank, 9-bit time–digital-converter-assisted compressive-sensing analogue–digital-converter with 4 GS/s equivalent speed, IET Electronics Letters, vol. 52, no. 6, pp. 430-432, 2016. (511.29 KB)
M. Courbariaux, Hubara, I. , Soudry, D. , El-Yaniv, R. , and Bengio, Y. , Binarized neural networks: Training deep neural networks with weights and activations constrained to+ 1 or-1, arXiv preprint arXiv:1602.02830, 2016.
G. Chen and Needell, D. , Compressed sensing and dictionary learning, Preprint, vol. 106, 2015.
E. J. Candès and Wakin, M. B. , An introduction to compressive sampling, IEEE signal processing magazine, vol. 25, pp. 21–30, 2008.
E. J. Candès and Wakin, M. B. , An introduction to compressive sampling, IEEE signal processing magazine, vol. 25, pp. 21–30, 2008.
A. Putnam, Caulfield, A. M. , Chung, E. S. , Chiou, D. , Constantinides, K. , Demme, J. , Esmaeilzadeh, H. , Fowers, J. , Gopal, G. Prashanth, Gray, J. , and , , A reconfigurable fabric for accelerating large-scale datacenter services, IEEE Micro, vol. 35, pp. 10–22, 2015.
A. Putnam, Caulfield, A. M. , Chung, E. S. , Chiou, D. , Constantinides, K. , Demme, J. , Esmaeilzadeh, H. , Fowers, J. , Gopal, G. Prashanth, Gray, J. , and , , A reconfigurable fabric for accelerating large-scale datacenter services, IEEE Micro, vol. 35, pp. 10–22, 2015.
A. Putnam, Caulfield, A. M. , Chung, E. S. , Chiou, D. , Constantinides, K. , Demme, J. , Esmaeilzadeh, H. , Fowers, J. , Gopal, G. Prashanth, Gray, J. , and , , A reconfigurable fabric for accelerating large-scale datacenter services, IEEE Micro, vol. 35, pp. 10–22, 2015.
A. Putnam, Caulfield, A. M. , Chung, E. S. , Chiou, D. , Constantinides, K. , Demme, J. , Esmaeilzadeh, H. , Fowers, J. , Gopal, G. Prashanth, Gray, J. , and , , A reconfigurable fabric for accelerating large-scale datacenter services, IEEE Micro, vol. 35, pp. 10–22, 2015.
L. Cheng, Xu, W. , Ren, F. , Gong, F. , Gupta, P. , and He, L. , Statistical Timing and Power Analysis of VLSI Considering Non-linear Dependence, the VLSI Journal Integration, vol. 47, no. 4, pp. 487–498, 2014. (845.26 KB)