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J. Martin Duarte-Carvajalino and Sapiro, G. , “Learning to sense sparse signals: Simultaneous sensing matrix and sparsifying dictionary optimization”, IEEE Transactions on Image Processing, vol. 18, pp. 1395–1408, 2009.
A. Dua, “Hardware Acceleration of Video Analytics on FPGA Using OpenCL”, Arizona State University, Tempe, 2019. (2.83 MB)
A. Dua, Li, Y. I. , and Ren, F. , “Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing”, 2020.
R. Dorrance, Ren, F. , Toriyama, Y. , Hafez, A. Amin, Yang, C. - K. K. , and Marković, D. , “Scalability and Design-space Analysis of A 1T-1MTJ Memory Cell For STT-RAMs”, IEEE Transactions on Electron Devices, vol. 59, no. 4, pp. 878–887, 2012. (1.1 MB)
R. Dorrance, Ren, F. , Toriyama, Y. , Amin, A. , Yang, C. - K. K. , and Marković, D. , “Scalability And Design-space Analysis of A 1T-1MTJ Memory Cell”, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE, pp. 32-36, 2011. (1.1 MB)
R. Dorrance, Ren, F. , and Marković, D. , “A Scalable Sparse Matrix-vector Multiplication Kernel for Energy-efficient Sparse-BLAS on FPGAs”, Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA). ACM, pp. 161-170, 2014. (558.35 KB)
D. L. Donoho and Tsaig, Y. , “Fast solution of $$\backslash$ell \_ $\$1$\$ $-norm minimization problems when the solution may be sparse”, IEEE Transactions on Information Theory, vol. 54, pp. 4789–4812, 2008.
M. A. Davenport, Duarte, M. F. , Eldar, Y. C. , and Kutyniok, G. , “Introduction to compressed sensing”, preprint, vol. 93, p. 2, 2011.
M. A. Davenport, Duarte, M. F. , Eldar, Y. C. , and Kutyniok, G. , “Introduction to compressed sensing”, preprint, vol. 93, p. 2, 2011.
W. Dally, “High-performance hardware for machine learning”, NIPS Tutorial, 2015.