Publication

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F. Ren, “Energy-performance Characterization of CMOS/Magnetic Tunnel Junction (MTJ) Hybrid Logic Circuits”, University of California, Los Angeles, Los Angeles, 2011. (1.05 MB)
A. Gunavelu Mohan, “Hardware Acceleration of Most Apparent Distortion Image Quality Assessment Algorithm on FPGA Using OpenCL”, Arizona State University, 2017. (1.21 MB)
A. Dua, “Hardware Acceleration of Video Analytics on FPGA Using OpenCL”, Arizona State University, Tempe, 2019. (2.83 MB)
Y. I. Li, “Hardware-friendly Deep Learning for Edge Computing”, Arizona State University, Tempe, 2021. (7.78 MB)
K. Xu, “Learning in Compressed Domains”, Arizona State University, Tempe, 2021. (18.22 MB)
F. Ren, “A Scalable VLSI Architecture for Real-Time and Energy-Efficient Sparse Approximation in Compressive Sensing Systems”, University of California, Los Angeles, Los Angeles, 2015. (5.71 MB)

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