New Publication TCAS-II'16 | Parallel Systems and Computing Laboratory (PSCLab)

March 4, 2016

Our paper "An 8-Bit Compressive Sensing ADC With 4GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search", co-authored with Prof. M.-C. F. Chang (UCLA), is published in IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II).

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Paper

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Fengbo Ren

ASU

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