Publication

Export 17 results:
Filters: First Letter Of Last Name is M  [Clear All Filters]
2021
J. Zhao, Westerham, M. , Lakatos-Toth, M. , Zhang, Z. , Moskoff, A. , and Ren, F. , OpenICS: Open Image Compressive Sensing Toolbox and Benchmark, Software Impacts, vol. 9, 2021. (362.26 KB)
2015
F. Ren and Marković, D. , A Configurable 12-to-237KS/s 12.8 mW Sparse-approximation Engine for Mobile ExG Data Aggregation, Proceedings of the 2015 IEEE International Solid-State Circuits Conference (ISSCC). IEEE, pp. 68-78, 2015. (6.94 MB)
A. Mousavi, Patel, A. B. , and Baraniuk, R. G. , A deep learning approach to structured signal recovery, Communication, Control, and Computing (Allerton), 2015 53rd Annual Allerton Conference on. IEEE, pp. 1336–1343, 2015.
D. Markovic and Ren, F. , Scalable and Parameterized VLSI Architecture for Compressive Sensing Sparse Approximation, US14/446,272, 2015.
2014
K. - L. Wang, Yang, C. - K. K. , Markovic, D. , and Ren, F. , Body Voltage Sensing Based Short Pulse Reading Circuit, PCT/US2012/056136, 2014.
R. Dorrance, Ren, F. , and Marković, D. , A Scalable Sparse Matrix-vector Multiplication Kernel for Energy-efficient Sparse-BLAS on FPGAs, Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA). ACM, pp. 161-170, 2014. (558.35 KB)
F. Ren, Zhang, C. , Liu, L. , Xu, W. , Owall, V. , and Marković, D. , A Square-Root-Free Matrix Decomposition Method for Energy-Efficient Least Square Computation on Embedded Systems, IEEE Embedded Systems Letters, vol. 6, no. 4, pp. 73–76, 2014. (912.74 KB)
2013
F. Ren, Park, H. , Yang, C. - K. K. , and Marković, D. , Reference Calibration of Body-voltage Sensing Circuit for High-speed STT-RAMs, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 60, no. 11, pp. 2932–2939, 2013. (1.78 MB)
F. Ren, Xu, W. , and Marković, D. , Scalable and Parameterised VLSI Architecture for Efficient Sparse Approximation in FPGAs And SoCs, IET Electronics Letters, vol. 49, no. 23, pp. 1440–1441, 2013. (154.45 KB)
F. Ren, Dorrace, R. , Xu, W. , and Marković, D. , A Single-precision Compressive Sensing Signal Reconstruction Engine on FPGAs, Proceedings of the 23rd International Conference on Field Programmable Logic and Applications (FPL). IEEE, pp. 1-4, 2013. (358.12 KB)
2012
F. Ren, Park, H. , Dorrance, R. , Toriyama, Y. , Yang, C. - K. K. , and Marković, D. , A Body-voltage-sensing-based Short Pulse Reading Circuit for Spin-torque Transfer RAMs (STT-RAMs), Proceedings of the 2012 13th International Symposium on Quality Electronic Design (ISQED). IEEE, pp. 275-282, 2012. (559.47 KB)
R. Dorrance, Ren, F. , Toriyama, Y. , Hafez, A. Amin, Yang, C. - K. K. , and Marković, D. , Scalability and Design-space Analysis of A 1T-1MTJ Memory Cell For STT-RAMs, IEEE Transactions on Electron Devices, vol. 59, no. 4, pp. 878–887, 2012. (1.1 MB)
2011
H. Park, Dorrance, R. , Amin, A. , Ren, F. , Marković, D. , and Yang, C. K. Ken, Analysis of STT-RAM Cell Design With Multiple MTJs Per Access, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE Computer Society, pp. 53-58, 2011. (320.88 KB)
R. Dorrance, Ren, F. , Toriyama, Y. , Amin, A. , Yang, C. - K. K. , and Marković, D. , Scalability And Design-space Analysis of A 1T-1MTJ Memory Cell, Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE, pp. 32-36, 2011. (1.1 MB)
2010
F. Ren and Marković, D. , True Energy-performance Analysis Of The MTJ-based Logic-in-memory Architecture (1-bit Full Adder), IEEE Transactions on Electron Devices, vol. 57, no. 5, pp. 1023–1028, 2010. (632.59 KB)